As of today the first handful of commits have landed in LLVM Git ahead of next year’s LLVM 20.0 for beginning to enable the AMDGPU compiler back-end for “GFX950”, the next iteration of the CDNA family for Instinct accelerators.
Given the patches are still in the preliminary stages and more enablement of any new instructions and similar may still come, it’s difficult to definitively say whether AMD GFX950 is the MI325X or MI350 accelerator parts. I would imagine it’s for the AMD MI350 otherwise the LLVM support for MI325X is much later than normal for AMD’s open-source standards.
This commit lays out the initial AMD GFX950 target without revealing which Instinct product(s) are GFX950.
Follow-up commits add the v_prng_b32 instruction for GFX950 for rand num instruction for stochastic rounding, MFMA instructions, V_CVT_F32_BF16 BF16 conversion instructions, and increasing the LDS size to 160KB.
There are also other pull requests pending.
Great to see the AMD GFX950 enablement started for whatever Instinct product(s) this ends up correlating to but presumably the Instinct MI350 due for release in 2025… We’ll see in the days/weeks ahead what more GFX950 enablement code lands in upstream LLVM ahead of the LLVM 20.1 release around March.
