The PCI-SIG industrial organization has published the final draft of PCIE 7.0, the Next generation of the main bus (and almost unique) with which modern client computers and also servers dedicated to professional technologies such as quantum computing, cloud and data centers.
Although the deployment of PCIE 5.0 is in its beginnings and the following version 6.0 is still in a prototype phase, organizations that define the main standards of the industry are always advanced in their development because they need quite a long time until they reach the final customer.
Technological development never rests. And more with such an important PCI Express rule that has left legacy buses behind Isa, AGP, the original PCI or an increasingly used SATA. And is that This local entrance/output bus is used for everything on a PCthe internal connections of the integrated circuits of the motherboards (chipsets), communication with the CPU and also to install as important components such as graphics cards, SSDs or dedicated solutions of networks or sound.
PCIE 7.0 will offer great novelties
The final draft presented confirms the main novelties of the version and although some changes in the final protocol could occur after the hundreds of manufacturers that will use it, the main bases of the version are maintained.
And, to begin with, it will be the First version of PCI-Express that works on optical connections and that is why it will be the greatest advance since the creation of the standard. GEN7 will support in the future a wide range of optical technologies to continue improving the abilities of the standard in performance, energy consumption, latency and scope.
It will also be the second generation that uses signaling Pam4. This advance has not yet been incorporated into any commercial products since PCI Express 6.0 is not yet used, but PAM4 is capable of transmitting two bits by symbol, doubleing the data speed compared to the previous NRZ signaling, used in PCI Express 5.0 and previous generations.
Maintaining the integrity of the signal at the same time that the bandwidth is doubled was becoming a real concern with the NRZ signaling, so the use of PAM4 allows PCIe 6.0 to maintain a frequency similar to the integrity of the PCIE 5.0 signal, while making the usual generational improvements.
The aforementioned changes will cause a Spectacular performance level. The bandwidth in a lane (x1) will support up to 128 GT/s, which means that in an X16 slot of a motherboard, such as the one used by the dedicated graphics cards, the bidirectional theoretical performance can be raised until 512 GB/S.. This leaves us, as a practical example, that an SSD can offer really incredible data transfer speeds of up to 60 Gbytes per second, but for this improvements in controllers and in the NAND Flash memories will be additionally needed.
Other PCIE 7.0 improvements are optimizations to improve energy efficiency and, like all other generations of PCI Express, It will be retrocompatible with previous generations. This means that you should not have trouble installing a more recent PCI 7.0 PCI card in a 6.0, 5.0 or 4.0 oldest slot. It will work at the speed of the previous generation, but apart from that, you should not experience important problems.
The backward compatibility has been a fundamental principle that the industry has maintained in the successive versions of the PCI Express standard, and will probably remain in the near future. If there are no important setbacks in the tests, the final standard of PCIE 7.0 is expected by the end of this year and with a launch for the end of this decade.
