Following AMX-FP8 support, AMX-AVX512, and other new Intel CPU ISA features being added to the LLVM Clang 20 compiler codebase, the Intel Diamond Rapids target is now upstreamed for allowing “-march=diamondrapids” targeting for these next-generation Xeon processors.
Similar to GCC 15 adding -march=diamondrapids support last week to its codebase, the LLVM Git code for LLVM/Clang 20 now also has the Diamond Rapids target merged.
The Intel Diamond Rapids target was merged yesterday into LLVM Git. (There was an initial issue leading to its revert but it since re-landed.)
LLVM/Clang 20 will be out around next March with the Intel Diamond Rapids target and all of the new CPU ISA features coming with these next-gen Xeon processors. There are many new Advanced Matrix Extensions (AMX) features with Diamond Rapids along with SM3, SM4, USER MSR, and other new capabilities.
