Merged today to LLVM Git for next spring’s LLVM 22.0 release is support for the Intel Nova Lake ISA targeting with the “-march=novalake” option.
Even with Intel’s open-source setbacks this year, they are still being quite punctual in enabling new CPU family targets in the open-source compilers like LLVM/Clang and GCC. After yesterday’s Wildcat Lake compiler enabling, a few minutes ago the initial Nova Lake targeting for LLVM/Clang was merged upstream. As of writing the similar patch for the GNU Compiler Collection (GCC) has yet to be posted or merged but presumably will come about in the days ahead.
This follows the September update to the Intel ISA extensions programming reference guide. Making use of -march=novalake enables the same ISA capabilities of Panther Lake but also PREFETCHI appearing for these future Intel consumer processors.
PREFETCHI is already supported on the Intel Xeon side with Granite Rapids and forward with Diamond Rapids and Clearwater Forest. AMD already supports PREFETCHI across all their Zen 5 processors.
The LLVM enablement patch also reiterates Nova Lake as Family 18 models 1 and 3 for those processors.
Sadly no signs of AVX10 or AMX (or ACE) with Nova Lake unless it’s going to be a late disclosure or surface in follow-up patches.
Intel Nova Lake will launch later in 2026~2027 with Coyote Cove and Arctic Wolf cores while rumored to feature up to 52 cores and a variety of other enhancements over Panther Lake and Arrow Lake. Recent Linux patches also confirm Nova Lake featuring integrated Xe3P graphics.
