Intel today released a new version of their Compute Runtime stack and IGC graphics compiler for Level Zero and OpenCL usage with their integrated and discrete graphics. Separately they also upstreamed more SYCL code this week into mainline LLVM.
The Intel Compute Runtime and Intel Graphics Compiler have seen continued work on Nova Lake enablement as well as the Crescent Island card that’s sampling later this year. The Intel Compute Runtime 26.05.37020.3 changes include:
– Continued work around Nova Lake S bring-up.
– Updating Nova Lake U device IDs.
– Continued work around enabling the Crescent Island AI accelerator card.
– Enabling staging on platforms since Xe2 to help with performance.
– Switching to the writeback L1 cache policy sincr Xe3 graphics.
– Adding an IPC Unix sockets fallback for Linux.
– Support for VR temperature sensors.
– Multi-GPU capability for memAdvise interface.
– A cache tree structure feature.
– Support for the multi-queue user-space API.
– TBX support for host functions.
– Handling of VM Bind Debug Data Op.
– Preparations for Level Zero 1.15 APIs.
– Various code clean-ups and refactoring.
More details on the new Compute Runtime release via GitHub. The Intel Compute Runtime continues to support from Tigerlake graphics through Battlemage and Panther Lake hardware plus the experimental support for next-gen Nova Lake and Crescent Island too.
There is also the IGC 2.28.4 release for the Intel Graphics Compiler. Intel Graphics Compiler 2.28.4 chhanges include:
– Adapting for LLVM API changes and other changes for the (dated) Clang 17.
– Enabling the joint-waveall vectorization by default.
– Enabling SPIR-V validation by default.
– Various changes for Crescent Island.
The updated IGC 2.28.4 can be downloaded from GitHub.
Great timing for the new Intel Compute Runtime and IGC as some Panther Lake Arc B390 GPU compute benchmarks are on my TODO list for the coming days.
Separately but also of note on the Intel GPU compute side is Intel having upstreamed a sycl::device implementation into mainline LLVM. This is part of Intel’s broader SYCL support upstreaming effort to LLVM.
