One topic we haven’t heard AMD talk too much about publicly this year has been their openSIL effort that was announced back in 2023 as their eventual replacement to AGESA and being an open-source CPU silicon initialization effort. They still appear to be working toward making openSIL production-ready for next-generation Zen 6 platforms but some of their proof-of-concept milestones have been running behind schedule. Meanwhile their EPYC 9005 “Turin” proof-of-concept code was recently published.
Last year they presented an openSIL road-map for a Q4’2024 release of the proof-of-concept ports for Turin and Phoenix. Turin being the AMD EPYC 9005 series server processors and Phoenix primarily for the Ryzen 7040 series laptop SoCs. That AMD slide last year from OSFC 2024:
Unfortunately that Q4’2024 release target for openSIL on Phoenix and Turin didn’t pan out for any open-source code release. We are now half-way through 2025 without any new open-source code drop for the Phoenix SoCs.
Last week though was finally a public answer about the Phoenix status… 3mdeb firmware engineer Michał Żygowski asked about the openSIL Phoenix proof-of-concept status and managed to receive a brief response from one of the AMD firmware engineers on GitHub:
“We understand the importance of this project to the open-source community and are committed to delivering it as promised.
Currently, the Phoenix openSIL PoC release is still being worked on internally at AMD. We have encountered some delays in obtaining the necessary approvals to open source the code, which has impacted our timeline. We are actively working to resolve these issues and are making every effort to expedite the process.
We appreciate your patience and understanding. We will provide an update as soon as we have a clearer timeline for the release.”
So the proof-of-concept is still coming for those laptop APUs/SoCs but the open-source code drop is still held up with internal approvals.
What about the Turin PoC? I had been wondering about that myself since it was also supposed to be out before the end of 2024… I had asked some at AMD about it before to no direct answer but then while working on this article after seeing the Phoenix question raised last week, it turned out the Turin PoC was in fact published.
The OpenSIL GitHub repository points to the Genoa PoC by default and that hasn’t been touched since May 2024. But published without any fan fare or reporting was this “turin_poc” Git branch.
That Turin openSIL code has been tested against AMD’s Galena and Purico reference servers. The openSIL code for Turin is open-source under an MIT license.
The documentation for the Turin code does note the production phase for openSIL now falling in “Phase IV: – AMD openSIL POR with UEFI Host FW trending EOY 2026 or early 2027.” That’s in contrast to the roadmap documentation on the older Genoa PoC that cited “Phase IV: – AMD openSIL POR with UEFI Host FW trending 2026.” So now it appears the openSIL production phase aligning for end of year 2026 or early 2027 as opposed to just “2026”. That puts it for Zen 6 still though not clear if AGESA will remain supported / used at first and openSIL becoming an alternative post-launch or how this transition will be handled for Zen 6 platforms.
In any case, the Turin PoC code for openSIL is quietly available it turns out and hopefully it won’t be too much longer before the Phoenix PoC is published.
