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World of Software > Computing > AMD SDCIAE Working Its Way Into The Linux 6.19 Kernel
Computing

AMD SDCIAE Working Its Way Into The Linux 6.19 Kernel

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Last updated: 2025/11/24 at 12:46 PM
News Room Published 24 November 2025
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AMD SDCIAE Working Its Way Into The Linux 6.19 Kernel
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A year and a half after the Linux kernel patches were first posted, SDCIAE that is found with AMD Zen 5 server processors is set to finally be supported by the mainline kernel come Linux 6.19.

SDCIAE is Smart Data Cache Injection Allocation Enforcement. AMD first posted the Linux patches back in August 2024 that at the time were for “upcoming” CPUs. AMD since formally unveiled SDCI/SDCIAE as one of the new features of 5th Gen EPYC CPUs.

This feature allows an I/O device to inject data directly into the cache hierarchy to improve utilization and reduce memory bandwidth for high I/O workloads. SDCI(AE) builds upon PCI Express TLP Processing Hints that AMD contributed to the Linux kernel and were upstreamed in late 2024. AMD talked up some hefty advantages for the Smart Data Cache Injection feature back during their 5th Gen EPYC “Turin” launch presentation:

AMD SDCI / TPH slide for 5th Gen EPYC

Finally for Linux 6.19 as what will be the first major kernel version of 2026, this feature should finally be in place.

SDCIAE patches queued

After going through 12 rounds of revisions and review the past year and a half, the SDCIAE patches were queued in the past few days to tip/tip.git’s x86/cache Git branch.

The initial enabling patch sums up SDCIAE as:

“Smart Data Cache Injection (SDCI) is a mechanism that enables direct insertion of data from I/O devices into the L3 cache. By directly caching data from I/O devices rather than first storing the I/O data in DRAM, SDCI reduces demands on DRAM bandwidth and reduces latency to the processor consuming the I/O data.

The SDCIAE (SDCI Allocation Enforcement) PQE feature allows system software to control the portion of the L3 cache used for SDCI.

When enabled, SDCIAE forces all SDCI lines to be placed into the L3 cache partitions identified by the highest-supported L3_MASK_n register, where n is the maximum supported CLOSID.

Add CPUID feature bit that can be used to configure SDCIAE.”

With these patches now in a TIP branch ahead of the Linux 6.19 merge window, they should be submitted for it in early December. So barring any last minute issues or objections from Linus Torvalds, this exciting AMD EPYC 9005 series feature should be in place for Linux 6.19. The stable Linux 6.19 kernel should be out in February.

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