Function Multi-Versioning (FMV) is the compiler feature that allows developers to specify multiple versions of the same function that can be used for optimizing execution for specific target features. For example, FMV can allow optimized functions to be called if the CPU supports AVX, AVX-512, SSE4.2, or other differing ISA capabilities. With the GCC 16 compiler release, AArch64/ARM64 now considers its FMV support to be stable and complete.
With this commit yesterday to the GCC Git codebase ahead of next year’s GCC 16.1 compiler release, Function Multi-Versioning is now treated as stable on 64-bit ARM hardware.
Up to now using FMV on AArch64 would emit a warning:
“Function Multi Versioning support is experimental, and the behavior is likely to change”
But now the FMV support on AArch64 is considered spec compliant and good enough for treating as stable. Arm engineers had been working on GCC FMV support the past 3+ years.
Arm’s FMV support allows calling different functions if the processor supports Scalable Vector Extension (SVE), Scalable Matrix Extension (SME), the dot product extension, and a wide variety of other Arm ISA features. The Arm FMV specification is documented via this repository.
Those wanting to learn more about GCC’s FMV support can do so via the GCC Wiki.
