Not in time for the current Linux 7.0 cycle but posted for another round of review is Intel’s latest work around Cache Aware Scheduling for enhancing the performance of modern CPUs with multiple cache domains. This is the first set of updates to Cache Aware Scheduling for the new year and succeed the v2 patches from early December. This work not only benefits modern Intel CPUs but our testing has shown can also provide some very nice gains too for AMD EPYC processors.
Cache Aware Scheduling works to colocate tasks sharing data to the same cache domain for ensuring better cache locality and reducing cache misses and cache bouncing.
The new Cache Aware Scheduling patches this week will now skip this scheduling behavior after repeated load balancing failures, avoids some costly sorting behavior, accounting of the number of tasks preferring each last level cache (LLC) is now kept in the lowest-level sched domain per CPU, and various other updates.
Benchmarks I’ve done recently of this Linux Cache Aware Scheduling include Linux’s Proposed Cache Aware Scheduling Benchmarks Show Big Potential On AMD EPYC Turin and Cache Aware Scheduling Raises Performance For Intel Xeon 6 Granite Rapids.
Those interested in trying out these fresh Cache Aware Scheduling patches that are also now re-based against Linux 6.19 can see the v3 patch series on the mailing list. Here’s to hoping that Cache Aware Scheduling manages to make it into the mainline Linux kernel in 2026.
