Coming out this week was an updated AVX10 whitepaper from Intel with the surprising decision that 512-bit floating point and integer support is no longer considered optional for AVX10.2. AVX10.2 now mandates 128 / 256 / 512-bit support and in turn also dropped the 256-bit embedded rounding support with the focus on 512-bit. The LLVM/Clang compiler had seen its AVX10 support designed around Intel’s original AVX10 design assumptions and thus now is being modified to address these changes.
Intel now confirming all AVX10.2 processors will have AVX10 512-bit support is fantastic albeit overdue. Thus both future Intel E cores and P cores are expected to have AVX10.2 512-bit support as a win for performance and also programming simplicity and helping in areas like x86_64 micro-architecture feature levels.
The open-source compilers that already had worked out their AVX10.2 support thus are needing to correct their assumptions around 256-bit / 512-bit support, drop safeguards for no 512-bit support on AVX10.2, and remove the 256-bit embedded rounding support now that it’s no longer needed.
Following the GCC patches talked about in the earlier article, over the past day there have been LLVM merge requests opened by Intel engineers for addressing their AVX10.2 support. See this pull request search but long story short the open-source LLVM compiler is being updated against the latest AVX10 whitepaper.
