LLVM Lands Initial Support For IBM SystemZ “arch15” Target: IBM z17 / Telum II

Merged this week into the LLVM compiler codebase is initial support for “arch15” within the SystemZ back-end. Arch15 likely correlates to the IBM z17 mainframes with Telum II processors.

Arch14 was for IBM z16 and now Arch15 support is appearing in compilers likely for IBM z17. The IBM z17 / Telum II was talked about last year at the Hot Chips conference with a focus on AI acceleration and other features. IBM z17 mainframes with the IBM Telum II processors are expected to be available in 2025. The Telum II processor was announced by IBM as eight cores running at 5.5GHz, virtual L3 cache at 360MB, and virtual L4 at 2.88GB. Telum II also has a new data processing unit (DPU), I/O acceleration enhancements, and other features in the name of AI.

For now the LLVM mainline support just handles “-march=arch15” but the LLVM commit notes that once hardware becomes available, the official system name will be added.

This commit adds the initial arch15 target to the LLVM SystemZ back-end. This Arch15 support will be part of the LLVM 20 release coming out this spring.