For Marvell’s line of Octeon line of data processing units (DPUs) and baseband processors, it looks like a new DPU is on the way with the CN20K silicon seeing work on enabling Linux support.
A Marvell engineer on Sunday sent out the latest patches for enabling the CN20K silicon within the Linux networking subsystem. The Marvell CN20K is described as the “next generation silicon in the Octeon series.”
The Linux patch series explains:
“CN20K is the next generation silicon in the Octeon series with various improvements and new features.
Along with other changes the mailbox communication mechanism between RVU (Resource virtualization Unit) SRIOV PFs/VFs with Admin function (AF) has also gone through some changes.
Some of those changes are
– Separate IRQs for mbox request and response/ack.
– Configurable mbox size, default being 64KB.
– Ability for VFs to communicate with RVU AF instead of going through parent SRIOV PF.Due to more memory requirement due to configurable mbox size, mbox memory will now have to be allocated by
– AF (PF0) for communicating with other PFs and all VFs in the system.
– PF for communicating with it’s child VFs.On previous silicons mbox memory was reserved and configured by firmware.”
This initial patch series for the Octeon CN20K is mostly focused on the mailbox changes while presumably more CN20K Linux patches will follow.
The Marvell OCTEON 10 correlates to the CN10K so presumably the CN20K will be for an “OCTEON 20” DPU product.
