NeoLogic Ltd., a startup that hopes to make processors more efficient by reducing their transistor counts, has raised $10 million in funding.
The company announced the Series A round today. It detailed that KOMPAS VC led the investment with participation from M Ventures, Maniv Mobility and lool Ventures.
A processor consists of numerous transistor collections called gates. Those gates are almost always made using a technology called CMOS. A CMOS gate includes two transistors with different electrical properties: one requires a positive charge to switch from 0 to 1 while the other requires a positive charge.
Israel-based NeoLogic has developed a new chip design approach that it calls CMOS+. According to the company, it combines standard CMOS gates with so-called reduced-complexity gates that are made using different technologies. NeoLogic says that its approach can reduce the size of processors by 40% while halving their power consumption.
One way CMOS+ boosts processing efficiency is by reducing the number of transistors that engineers must include in chips. According to NeoLogic, the technology can enable a threefold reduction in a chip’s transistor count under certain conditions. The fewer transistors that are in a chip, the less power it consumes.
NeoLogic says that its technology also improves processors’ energy-efficiency in other ways.
By default, standard CMOS gates have limited fan-in, which means they can only process a small number of data points in parallel. That slows down their processing speed. Boosting fan-in usually requires engineers to implement complex circuit designs that can significantly increase a chip’s power usage.
NeoLogic says that its CMOS+ technology addresses those trade-offs with so-called single stage gates. According to the company, those gates can process significantly more data points in parallel than a standard CMOS circuit while using less power.
NeoLogic’s CMOS+ technology also features a buffer design optimized for energy efficiency. Buffers are circuits in which a processor keeps the data that it’s actively using in calculations. The company says that its design boosts power-efficiency by increasing the surface area of buffers.
NeoLogic was founded in 2021 by Chief Executive Officer Avi Messica (pictured, left) and Chief Technology Officer Ziv Leshem (right). Messica told EE Times Europe that processors based on CMOS+ will lend themselves to running artificial intelligence models. The company believes that its technology can perform inference using less power than graphics cards.
According to NeoLogic, its engineers are using CMOS+ to develop a series of central processing units for servers. The company hopes to produce a single-core test CPU later this year. It plans to start deploying CMOS+ processors in data centers by 2027.
NeoLogic will use its newly raised funding to hire more engineers and accelerate its commercialization efforts.
Photo: NeoLogic
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