Modern IT has been resting for decades on binary logic, an architecture of calculation founded as everyone knows on 0 and 1. If this model has enabled immense advances, it reaches its limits today. In question: the “Power Wall”, that is to say an ever higher energy consumption for a computing power that stagnates, and the “Wall architecture”, in other words the increasing incompatibility between new calculation approaches and existing systems.
When the binary is no longer enough
A team from Beihang University in Beijing, led by Professor Li Honggege, wants to blow up the Binary glass ceiling. Their idea: mix the traditional calculation based on 0 and 1 with a more random method, which works with repeated electrical signals. This approach consumes less energy and requires less material, but it is also a little slower. By combining the two, the researchers hope to get the most out of both worlds.
By merging these two logics within the same architecture, the researchers claim to have found an unprecedented balance between performance, tolerance to breakdowns and energy sobriety.
China was quick to experience these hybrid chips in sensitive fields. A first model, designed in 2023, was made from a technology proven in 110 nanometers by the National Smic founder. A second, more advanced, dedicated to automatic learning algorithms, uses a finer engraving (28 Nm).
Uses concern critical functions, such as display systems in aviation, processing of touch signals or on board navigation systems. The chip would allow, for example, to better filter electronic noise to detect weak signals on a touch screen, while consuming little energy. It also incorporates a “on chip” system, capable of managing several types of calculations in parallel – a rarity in traditional architectures.
According to the Official Journal of Beijing, this project represents the first attempt at mathematical standardization of the three logics – binary, classic and hybrid stochastics – with a comparative analysis of their performance in the face of disturbances, errors and energy consumption.
Li Honggege also indicates that its teams work on a dedicated Set Architecture (ISA) instruction and on a microarchitecture optimized for this type of calculation. Image processing, voice recognition and acceleration of artificial intelligence models could benefit from it.
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